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S3C9654/C9658/P9658
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM88RCRI PRODUCT FAMILY
Samsung's SAM88RCRI family of 8-bit single-chip CMOS microcontrollers offer fast and efficient CPU, a wide range of integrated peripherals, and supports OTP device. A dual address/data bus architecture and bit- or nibble-configurable I/O ports provide a flexible programming environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating modes are included to support real-time operations.
S3C9654/C9658/P9658 MICROCONTROLLER
The S3C9654/C9658/P9658 microcontroller with USB function can be used in a wide range of general purpose applications. It is especially suitable for mouse or joystick controller and is available in 16, 18, 20-pin DIP and SOP package. The S3C9654/C9658/P9658 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built around the powerful SAM88RCRI CPU core. Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register space, the size of the internal register file was logically expanded. The S3C9654/C9658/P9658 has 4/8 Kbytes of program memory on-chip (S3C9654/C9658), and 208 bytes of RAM including 16 bytes of working register. Using the SAM88RCRI design approach, the following peripherals were integrated with the SAM88RCRI core: -- Three configurable I/O ports (14 pin, at 20 pin) -- 14-bit programmable pins for external interrupts (at 20 pin) -- 8-bit timer/counter with two operating modes
OTP
The S3C9654/C9658 microcontroller is also available in OTP (One Time Programmable) version. S3P9658 microcontroller has an on-chip 4/8 Kbyte one-time-programmable EPROM instead of masked ROM. The S3P9658 is comparable to S3C9654/C9658, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
S3C9654/C9658/P9658
FEATURES
CPU
*
Timer/Counter
*
SAM88RCRI CPU core
Memory
* * * *
One 8-bit basic timer for watchdog function and programmable oscillation stabilization interval generation function One 8-bit timer/counter with Compare/Overflow counter
4-K byte internal program memory (ROM S3C9654) 8-K byte internal program memory (ROM S3P9658/C9658) 208-byte RAM 16 bytes of working register
*
USB Serial Bus
* *
Compatible to USB low speed (1.5 Mbps) device 1.0 specification. Serial bus interface engine (SIE) -- Packet decoding/generation -- CRC generation and checking -- NRZI encoding/decoding and bit-stuffing
Instruction Set
* *
41 instructions IDLE and STOP instructions added for powerdown modes
*
Two 8-byte receive/transmit USB buffer
Instruction Execution Time
*
Operating Temperature Range
*
0.66 s at 6 MHz fOSC
- 0C to + 85C
Interrupts
* * * *
Operating Voltage Range
*
14 interrupt sources with one vector (20 pin) 12 interrupt sources with one vector (18 pin) 10 interrupt sources with one vector (16 pin) One level, one vector interrupt structure
4.0 V to 5.25 V
Package Types
* *
16, 18, 20 pin DIP 16, 18, 20 pin SOP
Oscillation Circuit Options
* * * *
6 MHz crystal/ceramic oscillator External clock source RC oscillator Embedded oscillation capacitor (XI, XO, 33pF)
Comparator
* * *
6-channel mode, 32 step resolution 5-channel mode, external reference Low EMI design
General I/O
* * *
Low Voltage Reset
* *
14 bit-programmable I/O pins (20 pin) 12 bit-programmable I/O pins (18 pin) 10 bit-programmable I/O pins (16 pin)
Low voltage Reset Power on Reset
High Sink Current Pin for LED
*
Sub Oscillator
* *
P0.0 (VOL: 0.4 V, 50mA)
Internal RC sub oscillator Auto interrupt wake-up
1-2
S3C9654/C9658/P9658
PRODUCT OVERVIEW
BLOCK DIAGRAM
TEST RESET XIN OSC XOUT
Port I/O and Interrupt Control
Port 1/ Compa -rator
P1.0/CIN0/INT1 P1.1/CIN0/INT1 P1.2/CIN0/INT1 P1.3/CIN0/INT1 P1.4/CIN0/INT1 P1.5/CIN0/INT1
SUB OSC
Basic Timer
SAM88RCRI CPU
Port 0
P0.0/INT0 P0.1/INT0 P0.2/INT0 (note) P0.3/INT0 (note) P0.4/INT0 (note) P0.5/INT0 (note)
Timer 0
LVR
8K (4K) ROM
208 Byte RAM
USB SIE
P2.1/D+/INT2 P2.0/D-/INT2
NOTE:
16, 18, 20 DIP and SOP.
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
S3C9654/C9658/P9658
PIN ASSIGNMENTS
P0.2/INT0 VSS P0.0/INT0 P1.0/COM0/INT1 P1.1/COM1/INT1 P1.2/COM2/INT1 P1.3/COM3/INT1 P1.4/COM4/INT1 P1.5/COM5/INT1 P0.4/INT0
1 2 3 4 5 6 7 8 9 10
20 19 18 17
P0.3/INT0 VDD P2.0/D-/INT2 P2.1/D+/INT2 RESET XIN XOUT TEST P0.1/INT0 P0.5/INT0
S3C9654/ S3C9658
16 15 14 13 12 11
Figure 1-2. Pin Assignment (20 Pin)
1-4
S3C9654/C9658/P9658
PRODUCT OVERVIEW
P0.2/INT0 VSS P0.0/INT0 P1.0/COM0/INT1 P1.1/COM1/INT1 P1.2/COM2/INT1 P1.3/COM3/INT1 P1.4/COM4/INT1 P1.5/COM5/INT1
1 2 3 4 5 6 7 8 9
18 17 16
P0.3/INT0 VDD P2.0/D-/INT2 P2.1/D+/INT2 RESET XIN XOUT TEST P0.1/INT0
S3C9654/ S3C9658
15 14 13 12 11 10
Figure 1-3. Pin Assignment (18 Pin)
VSS P0.0/INT0 P1.0/COM0/INT1 P1.1/COM1/INT1 P1.2/COM2/INT1 P1.3/COM3/INT1 P1.4/COM4/INT1 P1.5/COM5/INT1
1 2 3 4 5 6 7 8
16 15 14
VDD P2.0/D-/INT2 P2.1/D+/INT2 RESET XIN XOUT TEST P0.1/INT0
S3C9654/ S3C9658
13 12 11 10 9
Figure 1-4. Pin Assignment (16 Pin)
1-5
PRODUCT OVERVIEW
S3C9654/C9658/P9658
Table 1-1. Signal Descriptions Pin Names P0.0 Pin Type I/O Pin Description Bit-programmable I/O port for Schmitt trigger input or n-ch open drain output (50 mA). Pull-up resistor is assignable to input pin by software and is automatically disabled for output pin. Port 0 can be individually configured as external interrupt input. Bit-programmable I/O port for Schmitt trigger input or push-pull output. Pull-up resistors individually assignable to input pins by software and are automatically disabled for output pins. Port 0 can be individually configured as external interrupt inputs. Bit-programmable I/O port for Schmitt trigger input or push-pull output. Pull-up resistors are individually assignable to input pins by software. Port 1 can be configured as comparator input or external interrupt inputs. Pull-down resistors are individually assignable. (in comparator input) Bit-programmable I/O port for Schmitt trigger input or n-ch open drain output. Pull-up resistors are individually assignable to input pins by software and are automatically disabled for output pins. Port 2 can be individually configured as external interrupt inputs. Also it can be configured as an USB ports. System clock input and output pin (crystal/ceramic oscillator, or external clock source) External interrupt for bit-programmable port 0 External interrupt for bit-programmable port 1 External interrupt for bit-programmable port 2 Power input pin VSS is a ground power for CPU core. Reset input pin (Pull-up register embedded) Circuit Number SK Pin Numbers 3 Share Pins INT0
P0.1-P0.5
I/O
D
1, 10, 11, 12, 20
INT0
P1.0-P1.5
I/O
CP
4-9
CIN0-5 INT1
P2.0/D- P2.1/D+
I/O
CP
17, 18
INT2
XOUT, XIN
-
-
14, 15
-
INT0 INT1 INT2 VDD VSS RESET
I I I - - 1
D D D - - -
1, 3, 10, 11, 12, 20 4-9 17, 18 19 2 16
Port 0 Port 1 Port 2 - - -
1-6
S3C9654/C9658/P9658
PRODUCT OVERVIEW
Table 1-2. Pin Circuit Assignments for the S3C9654/C9658/P9658 Circuit Number C D SK CP Circuit Type O I/O I/O I/O Port 0.1-5, INT0, INT1, INT2 Port 0.0 Port 1, Port 2 S3C9654/C9658/P9658 Assignments
NOTE: Diagrams of circuit types C-D, and F-8 are presented below.
VDD VDD Pull-up Enable Data Output DIsable
Data
P-Channel Out
Output DIsable
N-Channel
Circuit Type C
I/O
Data
Figure 1-5. Pin Circuit Type C
Figure 1-6. Pin Circuit Type D
1-7
PRODUCT OVERVIEW
S3C9654/C9658/P9658
VDD Pull-up Registor
Pull-up Enable Output Disable Output Data
I/O
VSS Input Data MUX D0 D1 Mode Output Input Input Data D0 D1
Figure 1-7. Pin Circuit Type SK
VDD
Pull-up Enable Data Output DIsable
Circuit Type C
I/O
Data Input Enable Analog/ External VREF Input D+/D-
Figure 1-8. Pin Circuit Type CP
1-8
S3C9654/C9658/P9658
PRODUCT OVERVIEW
S3C9654/ S3C9658/S3P9658
XI 15 14 19 + C_BULK VSS VDD DD+ 2 17 18 XI XOUT VDD P0.2/INT0 1 VSS P0.1/INT0 12
Button SW1
Button SW3 VDD
Button DM1 VSS P0.3/INT0 P2.1/D+/INT2 P2.0/D-/INT2 VSS P1.0/COM0/INT1 4 5 VDD T_X D_X 20 VSS SW2 R_XY
To Host
13 16 VSS
P1.1/COM1/INT1 TEST RESET (note)
T_Y P1.2/COM2/INT1 P1.3/COM3/INT1 10 11 P0.4/INT0 P0.5/INT0 VDD R_Z 6 7 VDD
D_Y
T_Z P1.4/COM4/INT1 P1.5/COM5/INT1 P0.0/INT0 8 9 3
D_Z
NOTE:
RESET Pin is connected to internal Pull-up register after power on reset. If RESET Pin is low, S3C9654/C9658/P9658 goes to reset.
Figure 1-9. USB Mouse Circuit Diagram
1-9
S3C9654/C9658/P9658
ELECTRICAL DATA
15
OVERVIEW
-- I/O capacitance
ELECTRICAL DATA
In this section, the following S3C9654/C9658/P9658 electrical characteristics are presented in tables and graphs: -- Absolute maximum ratings -- D.C. electrical characteristics -- A.C. electrical characteristics -- Oscillator characteristics -- Operating voltage range -- Oscillation stabilization time -- Clock timing measurement points at XIN -- Data retention supply voltage in Stop mode -- Stop mode release timing when initiated by a RESET -- Stop mode release timing when initiated by an external interrupt -- Characteristic curves -- Comparator Electrical Characteristics
15-1
ELECTRICAL DATA
S3C9654/C9658/P9658
Table 15-1. Absolute Maximum Ratings (TA = 25C) Parameter Supply voltage Input voltage Output voltage Output current high Output current low Symbol VDD VI VO I OH I OL All ports All output ports One I/O pin active All I/O pins active One I/O pin active (except P0.0) Total pin current for ports 0, 1, 2 (except P0.0) P0.0 Operating temperature Storage temperature TA TSTG - - Conditions - Rating - 0.3 to + 6.5 - 0.3 to VDD + 0.3 - 0.3 to VDD + 0.3 - 18 - 60 + 30 + 100 + 50 0 to + 85 - 60 to + 150
C
Unit V V V mA mA
15-2
S3C9654/C9658/P9658
ELECTRICAL DATA
Table 15-2. D.C. Electrical Characteristics (TA = 0C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Input high voltage Symbol VIH1 VIH2 Input low voltage VIL1 VIL2 Output high voltage VOH XIN All input pins except VIL2, D+, D- XIN VDD = 4.0 V-5.25 V IOH = - 200 A All output ports except D+, D- VDD = 4.0 V-5.25 V IOL = 2 mA All output ports except D+, D-, P0.0 VOL = 0.4 V VIN = VDD All inputs except ILIH2 except D+, D-, XOUT VIN = VDD, XIN VIN = 0 V All inputs except ILIL2 except D+, D-, XOUT VIN = 0 V, XIN VOUT = VDD All output pins except D+, D- VOUT = 0 V All output pins except D+, D- XOUT, P0.0 VIN = 0 V, VDD = 5.0 V, Port 0, Port 1 VIN = 0 V, VDD = 5.0 V, Port 2 Normal operation mode, VDD = 4.0 V-5.25 V 6 MHz, CPU clock IDLE mode VDD = 4.0 V-5.25 V 6 MHz, CPU clock Stop mode, oscillator stop VDD = 4.0 V-5.25 V - Conditions All input pins except VIH2, D+, D- Min 0.8 VDD VDD - 0.5 - - VDD - 1.0 - - - Typ - Max VDD VDD 0.2 VDD 0.4 - Unit V
Output low voltage
VOL
-
-
0.4
Output low Current Input high leakage current
IOL ILIH1
50(4) - 3
mA A
ILIH2 Input low leakage current ILIL1
- -
- -
20 -3
ILIL2 Output high leakage current Output low leakage current Pull-up resistors ILOH ILOL
- - -
- - -
- 20 3 -3
RL1 RL2
25 -
-
50 4.3 6.5
100 - 15
K
Supply current
IDD1
mA
IDD2
-
2
4
IDD3
-
13
25
A
NOTES: 1. Supply current does not include current drawn through internal pull-up resistors or external output current load. 2. This parameter is guaranteed, but not tested (include D+, D-). 3. Only in 4.0 V to 5.25 V, D+ and D- satisfy the USB spec 1.0. 4. P0.0 designed for direct LED current sink, see the SNKCON resistor and Figure 1-9 (Page 1-9).
15-3
ELECTRICAL DATA
S3C9654/C9658/P9658
Table 15-3. Input/Output Capacitance (TA = 0C to + 85C, VDD = 0 V) Parameter Input capacitance Output capacitance I/O capacitance XI/XO capacitance Symbol CIN COUT CIO CXI, CXO XIN, XOUT - 33 - Conditions f = 1 MHz; unmeasured pins are connected to VSS Except XIN, XOUT Min - Typ - Max 10 Unit pF
Table 15-4. A.C. Electrical Characteristics (TA = 0C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Noise filter Symbol Conditions Min 100 Typ - Max 200 Unit ns tNF1H, tNF1L P1 (RC delay)
tNF1L
tNF1H
tNF2
0.8 VDD 0.5 VDD 0.2 VDD
Figure 15-1. Nose Filter Timing Measurement Points
15-4
S3C9654/C9658/P9658
ELECTRICAL DATA
Table 15-5. Oscillator Characteristics (TA = 0C + 85C) Oscillator Main crystal Main ceramic (fOSC) Clock Circuit
XIN
Test Condition Oscillation frequency VDD = 4.0 V-5.25 V
Min -
Typ 6.0
Max -
Unit MHz
XOUT
External clock
XIN
Oscillation frequency VDD = 4.0 V-5.25 V
-
6.0
-
MHz
XOUT
RC oscillator
XIN R XOUT
Oscillation frequency VDD = 5.0 V R = 22.6 K R = 8.8 K R = 3.2 K
MHz - - - 1.0 2.0 4.0 - - -
Table 15-6. Oscillation Stabilization Time (TA = 0C + 85C, VDD = 4.0 V to 5.25 V) Oscillator Main crystal Main ceramic Oscillator stabilization wait time Test Condition VDD = 4.0 V to 5.25 V, fOSC > 6.0 MHz (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) tWAIT stop mode release time by a reset tWAIT stop mode release time by an interrupt - - 216/fOSC - - - Min - Typ - Max 10 Unit ms
NOTE: The oscillator stabilization wait time, tWAIT, when it is released by an interrupt, is determined by the setting in the basic timer control register, BTCON.
15-5
ELECTRICAL DATA
S3C9654/C9658/P9658
1/fOSC tXL tXH
XIN
VDD - 0.5 V 0.4 V
Figure 15-2. Clock Timing Measurement Points at XIN
Table 15-7. Data Retention Supply Voltage in Stop Mode (TA = 0C to + 70C) Parameter Data retention supply voltage Data retention supply current Symbol VDDDR IDDDR Conditions Stop mode Stop mode; VDDDR = 2.0 V Min 2.0 - Typ - - Max 6 5 Unit V A
15-6
S3C9654/C9658/P9658
ELECTRICAL DATA
Stop Mode Data Retention Mode
IDLE Mode (Basic Timer Active)
~ ~
VDD
External Interrupt
Execution Of Stop Instrction
Figure 15-3. Stop Mode Release Timing When Initiated by an External Interrupt
Table 15-8. Comparator Electrical Characteristics (TA = 0C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Conversion time (1) Symbol tCON Conditions - Min - Typ 6 x 12 or 6 x 192 - 1000 - - - 1 0.5 100 Max - Unit f CPU
~ ~
VDDDR Normal Operating Mode 0.8 VDD 0.2 VDD tWAIT
Comparator input voltage Comparator input impedance Comparator reference voltage Comparator input current Reference input current Comparator block current (2)
VICN RCN VREF ICIN IREF ICOM VDD = 5 V VDD = 5 V VDD = 5.5 V VDD = 4.5 V
- - -
VSS 2 1.8 -3 -3 -
VDD - VDD 3 3 2 1 500
V M V A A mA mA nA
VDD = 5 V (when power down mode)
NOTES: 1. Conversion time is the time required from the moment a conversion operation starts until it ends. 2. ICOM is an operating current during conversion.
15-7
ELECTRICAL DATA
S3C9654/C9658/P9658
Table 15-9. Low Speed Source Electrical Characteristics (USB) (TA = 0C to + 85C, Internal Voltage Regulator Output V33OUT = 2.8 V to 3.6 V, typ 3.3 V) Parameter Transition Time: Rise Time Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Internal Voltage Regulator Output Voltage Tr Tf Trfm Vcrs V33OUT CL = 200 pF CL = 650 pF CL = 200 pF CL = 650 pF (Tr/Tf) CL = 50 pF CL = 50 pF VDD = 4.0 - 5.25 V 75 - 75 - 80 1.3 2.8 - 300 - 300 125 2.0 3.6 % V V ns Symbol Conditions Min Max Unit
Test Point D-/D+ D. U. T R1 C2 S/W
V33OUT R2
90 % Measurement Points 10 % Tr
90 %
10 % Tf
R1 = 15 K R2 = 1.5 K CL = 200 pF - 650 pF
DM: S/W ON DP: S/W OFF
Figure 15-4. USB Data Signal Rise and Fall Time
3.3 V DP VCRS MIN: 1.3 V DM 0V MAX: 2.0 V
Figure 15-5. USB Output Signal Crossover Point Voltage
15-8
S3C9654/C9658/P9658
MECHANICAL DATA
16
OVERVIEW
-- Pad diagram
MECHANICAL DATA
This section contains the following information about the device package: -- Package dimensions in millimeters
#20
#11
0-15
6.40 0.20
#1
#10
3.25 0.20
26.80 MAX 26.40 0.20
(1.77)
1.52 0.10
2.54
NOTE:
Dimensions are in millimeters.
Figure 16-1. 20-DIP 300A Package Dimensions
3.30 0.30
0.51 MIN
0.46 0.10
5.08 MAX
0.2
5
+0 - 0 .10 .05
20-DIP-300A
7.62
16-1
MECHANICAL DATA
S3C9654/C9658/P9658
#20
#11
6.48
20-DIP-300A-SG
7.62
9.25 3.51 4.06
0.3 8
#1
#10
28.85 3.43 (2.92) 1.63 2.54 16-2 0.89 0.56
Figure 16-2. 20-DIP-300A-SG Package Dimensions
S3C9654/C9658/P9658
MECHANICAL DATA
0-8 #20 #11
7.80 0.30
#1
#10
0.203
2.30 0.10
14.10 MAX 13.70 0.20
2.50 MAX
0.10 MAX
(0.66) 0.40
+ 0.10 - 0.05
1.27
NOTE:
Dimensions are in millimeters.
Figure 16-3. 20-SOP-300 Package Dimensions
0.05 MIN
0.85 0.20
+ 0.10 - 0.05
9.53
20-SOP-300
5.40 0.20
16-3
MECHANICAL DATA
S3C9654/C9658/P9658
#18
#10
18-DIP-300A-SG
10.03 3.51 4.06
0.3 8
6.48
#1
#9
23.50 3.18 (1.53) 1.63 2.54 16-4 0.89 0.56
Figure 16-4. 18-DIP-300A-SG Package Dimensions
7.62
S3C9654/C9658/P9658
MECHANICAL DATA
0-8 #18 #10
10.41
18-SOP-BD300-AN
7.59
0.29
#1
#9 0.32 2.64 1.02
18.06
0.48
1.27BSC
Figure 16-5. 18-SOP-BD300-AN Package Dimensions
16-5
MECHANICAL DATA
S3C9654/C9658/P9658
#16
#9
16-DIP-300A-SG
10.03
0.3 8
6.48
#1
#8
19.23 3.43 0.89 0.56 (0.53) 1.63 2.54 16-6 4.06 3.51
Figure 16-6. 16-DIP-300A-SG Package Dimensions
7.62
S3C9654/C9658/P9658
MECHANICAL DATA
0-8 #16 #9
10.50
16-SOP-BD300-SG
7.60
0.30
#1
#8 0.32 2.65 1.27
10.56
0.48
1.27BSC
Figure 16-7. 16-SOP-BD300-SG Package Dimensions
16-7
S3C9654/C9658/P9658
S3P9658 OTP
17
OVERVIEW
S3P9658 OTP
The S3P9658 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3P9658 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data format. The S3P9658 is fully compatible with the S3P9658, both in function and in pin configuration. Because of its simple programming requirements, the S3P9658 is ideal for use as an evaluation chip for the S3P9658.
P0.2/INT0 VSS/VSS P0.0/INT0 SCLK/P1.0/COM0/INT1 SDAT/P1.1/COM1/INT1 P1.2/COM2/INT1 P1.3/COM3/INT1 P1.4/COM4/INT1 P1.5/COM5/INT1 P0.4/INT0
1 2 3 4 5 6 7 8 9 10
20 19 18 17
P0.3/INT0 VDD P2.0/D-/INT2 P2.1/D+/INT2 RESET/RESET RESET XIN XOUT TEST/TEST P0.1/INT0 P0.5/INT0
S3P9658
16 15 14 13 12 11
NOTE:
The bold is indicate an OTP pin name.
Figure 17-1. S3P9658 Pin Assignments (20 Pin)
17-1
KS86P6504/P6508 OTP
S3C9654/C9658/P9658
P0.2/INT0 VSS/VSS P0.0/INT0 SCLK/P1.0/COM0/INT1 SDAT/P1.1/COM1/INT1 P1.2/COM2/INT1 P1.3/COM3/INT1 P1.4/COM4/INT1 P1.5/COM5/INT1
1 2 3 4 5 6 7 8 9
18 17 16 15
P0.3/INT0 VDD/VDD P2.0/D-/INT2 P2.1/D+/INT2 RESET/RESET RESET XIN XOUT TEST/TEST P0.1/INT0
S3P9658
14 13 12 11 10
NOTE:
The bold is indicate an OTP pin name.
Figure 17-2. S3P9658 Pin Assignments (18 Pin)
VSS/VSS P0.0/INT0 SCLK/P1.0/COM0/INT1 SDAT/P1.1/COM1/INT1 P1.2/COM2/INT1 P1.3/COM3/INT1 P1.4/COM4/INT1 P1.5/COM5/INT1
1 2 3 4 5 6 7 8
16 15 14
VDD/VDD P2.0/D-/INT2 P2.1/D+/INT2 RESET/RESET RESET XIN XOUT TEST/TEST P0.1/INT0
S3P9658
13 12 11 10 9
NOTE:
The bold is indicate an OTP pin name.
Figure 17-3. S3P9658 Pin Assignments (16 Pin)
17-2
S3C9654/C9658/P9658
S3P9658 OTP
Table 17-1. Descriptions of Pins Used to Read/Write the EPROM Main Chip Pin Name P1.0 Pin Name SDAT Pin Number (20 DIP) 5 During Programming I/O I/O Function Serial Data Pin (Output when reading, Input when writing) Input and Push-pull Output Port can be assigned Serial Clock Pin (Input Only Pin) 0 V : OTP write and test mode 5 V : Operating mode Chip Initialization and EPROM Cell Writing Power Supply Pin (Indicates OTP Mode Entering) When writing 12.5 V is applied and when reading. Logic Power Supply Pin.
P1.1 RESET TEST
SCLK RESET VPP (TEST) VDD/VSS
4 16 13
I/O I I
VDD/VSS
19/2
I
Table 17-2. Comparison of S3P9658 and S3C9654/C9658 Features Characteristic Program Memory Operating Voltage (VDD) OTP Programming Mode Pin Configuration EPROM Programmability S3P9658 8 K-byte EPROM 4.0 V to 5.25 V VDD = 5 V, VPP (TEST) = 12.5 V 20/18/16 DIP, 20/18/16 SOP User Program 1 time 20/18/16 DIP, 20/18/16 SOP, 16SSOP Programmed at the factory S3C9654/C9658 4/8 K-byte mask ROM 4.0 V to 5.25 V
OPERATING MODE CHARACTERISTICS When 12.5 V is supplied to the VPP (RESET) pin of the S3P9658, the EPROM programming mode is entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table 14-3 below. Table 17-3. Operating Mode Selection Criteria VDD 5V VPP (RESET RESET) 5V 12.5 V 12.5 V 12.5 V REG/MEM MEM 0 0 0 1 Address (A15-A0) 0000H 0000H 0000H 0E3FH R/W 1 0 1 0 EPROM read EPROM program EPROM verify EPROM read protection Mode
NOTE: "0" means Low level; "1" means High level.
17-3

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